Start With the Right HDI Stackup and Microvia Architecture

Designing a high-density interconnect microvia PCB begins long before the first trace is routed. The stackup defines which via structures are possible, how signals transition between layers, and whether the board can be fabricated at a cost-effective panel yield. In HDI design, the term microvia typically refers to a laser-drilled via with a diameter of 0.15 mm or smaller, often connecting only one or two adjacent layers. These structures allow escape routing from fine-pitch ball grid arrays, chip-scale packages, and high-pin-count processors where traditional through-hole vias simply do not fit.

A practical stackup strategy starts by identifying the component pitch and layer-count budget. For a 0.5 mm pitch BGA, a common approach is a 1+N+1 or 2+N+2 architecture, where microvias are formed on the outer layers and a conventional core or buried via structure carries signals through the center. A 1+N+1 structure places one microvia layer on the top and one on the bottom, while a 2+N+2 structure uses stacked or staggered microvias for more aggressive routing density. The choice between stacked and staggered microvias has a direct impact on reliability and cost. Stacked microvias improve routing freedom but require tighter registration and copper filling, while staggered microvias spread the mechanical stress across adjacent layers and are often easier to fabricate successfully.

Material selection also influences the HDI stackup. Low-loss laminates with a high glass transition temperature support high-speed signaling and multiple lamination cycles. Designers should confirm the dielectric thickness between microvia layers, because laser drilling stability and plating aspect ratio depend on consistent material thickness. For example, a 0.075 mm dielectric layer between layers 1 and 2 allows a reliable 0.1 mm laser via with a 1:1 aspect ratio, whereas a thicker dielectric may require a larger via diameter. Many engineering teams also review a detailed process guide on How to Design HDI Microvia PCB to align their initial stackup ideas with the manufacturer’s production capabilities.

The number of sequential lamination cycles should be kept as low as the design allows. Each additional microvia layer increases manufacturing steps, cost, and the risk of registration shift. A well-planned stackup reduces the need for excessive microvia levels by using buried vias for long vertical connections and reserving laser vias for short layer transitions. In automotive radar modules, aerospace avionics, and compact medical devices, this approach reduces the board’s total thickness while maintaining the reliability needed under thermal cycling and vibration.

Apply Microvia Design Rules That Balance Density and Manufacturability

Once the stackup is defined, the next critical step is applying design rules that keep the microvia structures producible. Laser-drilled microvias require precise pad and capture pad definitions. A typical capture pad for a 0.1 mm laser via is around 0.25 mm to 0.3 mm, providing enough surface area for plating and allowing the via to land cleanly on the target pad. If the capture pad is too small, the laser may miss the pad due to registration variation. If it is too large, the pad consumes routing channels and reduces the benefits of HDI technology.

The landing pad on the target layer must also be large enough to accept the via without creating an annular ring violation. A safe annular ring of at least 0.075 mm to 0.1 mm is commonly recommended, depending on the fabricator’s capability. For a 0.1 mm via, this means the target pad should be around 0.25 mm to 0.3 mm. Maintaining these values prevents open connections and improves long-term reliability. Designers should also avoid placing microvias directly under component bodies where solder wicking or voiding can occur, unless the via is filled and plated over.

Microvia holes should be filled with copper or a conductive material when they are used in via-in-pad designs. Via-in-pad is essential for high-density BGAs because it allows the via to be placed directly in the component land, but it requires the via to be filled, planarized, and over-plated to provide a flat solderable surface. Without proper filling, solder can wick into the via during assembly, creating voided joints and reducing contact area. Manufacturers often use copper-filled microvias with a plated cap for this purpose. The cap thickness should be specified based on the assembly process and thermal cycling requirements.

Trace routing around microvias must account for the reduced spacing between pads and the need for impedance control. With small capture pads, the breakout channels under a fine-pitch BGA are narrow. A common strategy is to route a trace between two adjacent microvia capture pads on the outer layer, but only if the pad-to-pad spacing allows a reliable etch and solder mask dam. Design rules should include a minimum solder mask dam width, typically 0.075 mm to 0.1 mm, to prevent solder bridges during assembly. If the dam is too small, the board may require a modified pad shape or a selective solder mask process.

For high-layer-count HDI boards, mixed via structures can further improve manufacturability. A designer may use a blind microvia from layer 1 to layer 2, a buried core via from layer 2 to layer 7, and another blind microvia from layer 7 to layer 8. This combination keeps each drilling and plating step within standard production limits while still achieving the required density. Clear documentation of the intended via type, fill requirement, and surface finish helps the fabricator plan the sequential lamination process accurately.

Optimize Signal Integrity, Power Delivery, and Thermal Performance

Microvia design is not only about fitting the interconnection; it is also about preserving electrical performance in high-speed and high-power applications. The compact nature of HDI boards means that signal return paths must be intentionally managed across multiple layers. Microvias have lower parasitic inductance than conventional through-hole vias, which makes them beneficial for high-frequency routing. However, the stub length of a via still influences insertion loss. In a blind microvia, the unused portion of the barrel is minimal, reducing reflections and supporting cleaner signal transitions for memory buses, serializer/deserializer links, and RF front-end modules.

To maintain signal integrity, designers should place ground reference layers adjacent to each signal layer and use ground microvias close to signal transitions. When a signal changes layers through a microvia, the return current must find a nearby path between the reference planes. Adding a ground microvia within 0.5 mm of the signal via minimizes loop inductance and reduces electromagnetic interference. This practice is especially important in high-speed digital designs for telecom and data processing equipment, where a small impedance discontinuity can degrade the eye diagram.

Power delivery also benefits from careful microvia placement. In HDI boards, power and ground planes may be interrupted by dense via fields, creating narrow neck regions that increase current density. Designers can use multiple parallel microvias to carry high current from a power plane to a device pad, reducing DC resistance and thermal stress. The number and size of microvias should be calculated based on the expected current, the copper thickness, and the acceptable temperature rise. A 0.1 mm copper-filled microvia can typically handle a limited current, so high-current rails such as processor core supplies often require several vias in parallel or a combination of microvias and buried vias.

Thermal management in HDI designs is closely tied to copper distribution. Microvias filled with copper act as small thermal channels that conduct heat from a component’s thermal pad into the inner layers or a heat spreader. For power amplifiers, LED arrays, and automotive engine-control modules, designers can place an array of microvias under the heat-generating component to lower the junction temperature. The spacing and pitch of these thermal vias should balance thermal conductivity with the need to keep solder paste from wicking away. When used with a solid copper plane or a metal-core substrate, the microvia array significantly improves heat spreading without increasing board outline.

Finally, mechanical reliability should be verified through the design rules. Microvias placed too close to the board edge or near routed slots can create stress concentration points during thermal cycling. A minimum distance of 0.5 mm to 0.75 mm from the board edge is often recommended for microvia pads. In flexible-rigid HDI constructions, the transition zones between rigid and flexible sections require extra attention, as repeated bending can fatigue plated microvias if they are placed inside the bend area. Keeping microvias out of the dynamic flex region and anchoring them in the rigid portion extends the service life of medical wearables, aerospace sensors, and industrial automation equipment.

Yara Domínguez

Raised in São Paulo’s graffiti alleys and currently stationed in Tokyo as an indie game translator, Yara writes about street art, bossa nova, anime economics, and zero-waste kitchens. She collects retro consoles and makes a mean feijoada.